geometry process details principal device types czt953 gross die per 5 inch wafer 3,878 process CP753V small signal transistors pnp - high current transistor chip process epitaxial planar die size 66 x 66 mils die thickness 7.1 mils base bonding pad area 7.9 x 7.9 mils emitter 1 bonding pad area 7.9 x 9.5 mils emitter 2 bonding pad area 7.9 x 9.5 mils top side metalization al-si - 30,000? back side metalization ti/ni/ag - 2,000?/3,000?/20,000? www.centralsemi.com r2 (22-march 2010)
process CP753V typical electrical characteristics www.centralsemi.com r2 (22-march 2010)
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